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- ダブルパターニングとは？
- ロードロック室を備えた基板の処理装置に関する特許の活用
- 高精細液晶パネル用ハーフトーンフォトスペーサーの開発
- 新規ポリマーを用いた高耐熱・高透明なマイクロレンズレジストの開発
- TMMR&TMMFシリーズ（感光性絶縁材料の開発）
- TLDPの開発
- 高速メッキ対応厚膜レジストPMER P-CX、P-CZ seriesの開発
- Zero Newton2用装置の開発および製品化
- ArF液浸用低欠陥ポジ型フォトレジストの開発
- WL-CSP用途向け高速Cu-Pillarめっき形成材料の開発
- KrF 3D-NAND用厚膜ポジ型フォトレジストの開発
- FO(Fan Outの略)パッケージ用途向けCu再配線形成材料の開発
- FPD用高解像ポジ型フォトレジストの開発 TFR-D1700/750
- 半導体最先端プロセス用洗浄液の開発
- パワー半導体の製造に貢献しているi線用フォトレジスト
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Technical Information
- Patent Utilization for a Substrate Processing Device With a Load Lock Chamber
- I-Line Photoresists That Contribute to Power Semiconductor Production
- What is Double Patterning?
- Development of Halftone Photospacers for High Definition LCD Panels
- Development of High Heat Resistance, High Transparency Microlens Resists Using Novel Polymer
- TMMR & TMMF Series (Development of Photosensitive Insulating Materials)
- TLDP Development
- Development of PMER P-CX and P-CZ Series Thick Film Resists for High Speed Plating
- Development and Commercialization of Zero Newton™2 Equipment
- Development of Low Defect Positive Photoresist for Immersion ArF
- Development of High Speed Cu Pillar Plating Materials for WL-CSP
- Development of Thick Film Positive Photoresist for KrF 3D-NAND
- Development of Cu RDL (Redistribution Layer) for FO (Fan Out) Packages
- Development of Positive Photoresist for High Resolution for FPD TFR-DI700/750
- Development of Cleaning Solutions for Advanced Semiconductor Processes
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