At Tokyo Ohka Kogyo, we offer semiconductor manufacturing processes that maximize the characteristics of materials through the development of process equipment and other devices based on our in-depth knowledge of semiconductor materials.
In recent years, our main product has been the Zero Newton™ wafer handling system, which is used in three-dimensional packaging, a manufacturing technology for next-generation high-performance semiconductors, and which contributes to the manufacturing process of semiconductors with even smaller dimensions, higher density, and lower power usage through stacking.

Manufacturing Process for Semiconductors

Process1 Film Deposition

This is the process of forming oxide and nitride films on silicon wafers.

Process1 Film Deposition

Process2 Photolithography Process/UV Curing Process

Photolithography Process

The process involves spinning the wafer at high speed, applying a uniform coat of photoresist to the wafer, and exposing and developing the photoresist pattern. We offer a wide range of spin coaters that satisfy requirements from research to mass production, and we also provide development equipment with reduced development time.

Process2 Photolithography Process/UV Curing Process

UV Curing Process

UV curing improves heat resistance, dry etching resistance, and chemical resistance. After that, in the etching process, the areas on the substrate not protected by resist are etched away.

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Process3 Etching

Areas without photoresist along the formed pattern are etched away.
After that, areas of the substrate that are not protected by the resist are etched away in the TCE system.

Process3 Etching

Process4 Photoresist Stripping/Cleaning

Unnecessary photoresist is removed, and impurities are removed from the wafer using cleaning equipment.
We provide plasma ashing equipment, which is increasingly being used for power semiconductor manufacturing.

Process4 Photoresist Stripping/Cleaning

Process5 Semiconductor Packaging Process

The wafer is cut and fixed in place at parts that will become the stage for the IC chip.
After connecting to the metal lead with a metal wire and having it tested for current flow, the outer region is covered with resin or ceramic and fixed in place.

Process5 Semiconductor Packaging Process

3-D Packaging Process Wafer-level TSV

Three-dimensional packaging (TSV) is a packaging technology in which thin pieces of semiconductor wafers with electronic circuits formed on them are stacked in three dimensions. Vias are used to energize the layers, resulting in many advantages such as smaller, denser, and more power-efficient semiconductors, as well as faster signal transmission and processing speeds.
For this stacking process, Tokyo Ohka Kogyo has developed processing equipment that attach and separate the semiconductor wafers to the support glass. This wafer handling system is the latest processing technology that enables greater efficiency in the 3D packaging process and meets the demands for higher performance semiconductors.

The support glass is attached to the wafer by applying adhesive for temporary attachment to either wafer or support glass.
After the back side processing (thinning and device fabrication), the support glass is removed and cleaned.

Apply Temporary Bonding Adhesive to Wafer or Support Glass
Apply Temporary Bonding Adhesive to Wafer or Support Glass
Attach the Wafer and Support Glass
Attach the Wafer and Support Glass
Removal of Support Glass and the Temporary Bonding Adhesive
Removal of Support Glass and the Temporary Bonding Adhesive

Three-Dimensional Packaging Process
Fan-Out Wafer Level Package FOWLP

The FOWLP system is used to apply a temporary bonding adhesive to the support glass with a release layer applied. After the chip has undergone mounting, molding, RDL, and bump processing, the support glass is removed and cleaned.
As an option, the support glass 2 can be attached to the substrate after RDL and bump processing. The same process can be carried out after support glass 1 is removed.

Apply the Release Layer and Temporary Adhesive to Support Glass 1
Apply the Release Layer and Temporary Adhesive to Support Glass 1
Chip Mounting, Molding, RDL, and Bump Processing
Chip Mounting, Molding, RDL, and Bump Processing
Removing the Support Glass and the Temporary Adhesive
Removing the Support Glass and the Temporary Adhesive
Optional Attachment to Support Glass 2
Optional Attachment to Support Glass 2
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Fan-Out Panel Level Packaging Process

Apply release layer and temporary bonding adhesive so that chips can be attached to support glass 1. (TN36000 series)
After the mold is formed, the support glass 2 with the temporary adhesive is attached. (TWM36000 series)
The support glass 1 is then removed and the device cleaned. (TWR36000 series).
RDL and other processes are carried out, and finally, the support glass 2 is removed and the device cleaned. (TWR36000 Series)

Apply Release Layer and Temporary Bonding Adhesive to Support Glass
Apply Release Layer and Temporary Bonding Adhesive to Support Glass
Attaching to Support Glass 2
Attaching to Support Glass 2
Remove the Support Glass and the Temporary Bonding Adhesive
Remove the Support Glass and the Temporary Bonding Adhesive

Manufacturing Process for Large Glass Substrates

Process1 Coating Process

The chemical is applied on the frame through the slit over the surface of the glass substrate. The chemical is applied evenly and precisely using only the slit coating without spinning.

Process1 Coating Process
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Process2 Temporary Drying Process (HVCD)

A vacuum is created inside the chamber,
which allows the solvent to evaporate at a low boiling point and dry. This prevents unevenness due to temperature changes that can easily affect the wet film.

Process2 Temporary Drying Process (HVCD)

Process3 Baking Process

The dried film is baked to cure the surface.
Baking is carried out at high temperature in a low oxygen environment.

Process3 Baking Process
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Newton in the text is a pending or registered trademark of TOK.

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